A CMOS transistor device is formed with a gate dielectric and a gate electrode, to control current flows through a channel under the gate dielectric between a pair of source/drain regions. As scaling down tendency continues, the gate dielectric begins to break down causing the gate dielectric to lose its insulating (dielectric) quality and to exhibit a larger leakage. There has been a desire to replace the gate oxide and the polysilicon gate with a high-k gate dielectric and metal gate electrode, in favor of improving device performance such as leakage and channel mobility. The high-k dielectric and metal gate electrode use metal gate stacks with the right work functions on the high-k dielectric for high-performance CMOS logic applications.